The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
Sep. 03, 2020
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chi-Ming Lu, Kaohsiung, TW;
Jung-Chih Tsao, Tainan, TW;
Yao-Hsiang Liang, Hsinchu, TW;
Chih-Chang Huang, Chiayi, TW;
Han-Chieh Huang, Kaohsiung, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method of forming a semiconductor device, comprising: forming a first conductive layer on an active device of a substrate; forming a dielectric layer on the first conductive layer; forming a through hole passing through the dielectric layer to expose a portion of the first conductive layer; conformally depositing a glue layer in the through hole to cover the portion of the first conductive layer comprising: forming a plurality of isolated lattices in an amorphous region at which the isolated lattices are uniformly distributed and extend from a top surface of the glue layer and terminate prior to reach a bottom of the glue layer, wherein the glue layer has a predetermined thickness; depositing a conductive material on the glue layer within the through hole, thereby forming a contact via; and forming a second conductive layer on the contact via over the first conductive layer.