The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Nov. 02, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yu-Hung Lin, Taichung, TW;

Sheng-Hsuan Lin, Zhubei, TW;

Chih-Wei Chang, Hsinchu, TW;

You-Hua Chou, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/285 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76858 (2013.01); H01L 21/28518 (2013.01); H01L 21/76846 (2013.01); H01L 21/76852 (2013.01); H01L 21/76855 (2013.01); H01L 21/76871 (2013.01); H01L 21/76883 (2013.01); H01L 21/76889 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 2221/1073 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.


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