The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Feb. 26, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chia-Kuei Hsu, Hsinchu, TW;

Ming-Chih Yew, Hsinchu, TW;

Tsung-Yen Lee, Changhua County, TW;

Po-Yao Lin, Hsinchu County, TW;

Shin-Puu Jeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 25/18 (2023.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4857 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/49822 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 23/3185 (2013.01); H01L 23/3192 (2013.01); H01L 24/92 (2013.01); H01L 2224/92125 (2013.01);
Abstract

A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package at least has a semiconductor die and a redistribution layer disposed on an active surface of the semiconductor die and electrically connected with the semiconductor die. The redistribution layer has a wiring-free zone arranged at a location below a corner of the semiconductor die. An underfill is disposed between the semiconductor die and the redistribution layer. The wiring-free zone is located below the underfill and is in contact with the underfill. The wiring-free zone extends horizontally from the semiconductor die to the underfill.


Find Patent Forward Citations

Hsu, Chia-Kuei. (2023). Semiconductor package and manufacturing method thereof (U.S. Patent No. 11756873). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11756873

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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