The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

Dec. 14, 2021
Applicant:

The 13th Research Institute of China Electronics Technology Group Corporation, Shijiazhuang, CN;

Inventors:

Yibang Wang, Shijiazhuang, CN;

Aihua Wu, Shijiazhuang, CN;

Faguo Liang, Shijiazhuang, CN;

Chen Liu, Shijiazhuang, CN;

Ye Huo, Shijiazhuang, CN;

Peng Luan, Shijiazhuang, CN;

Jing Sun, Shijiazhuang, CN;

Yanli Li, Shijiazhuang, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2020.01); G01R 31/319 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3191 (2013.01); G01R 31/2601 (2013.01);
Abstract

The present application provides two-port on-wafer calibration piece circuit models and a method for determining parameters. The method includes: measuring a single-port on-wafer calibration piece circuit model corresponding to a first frequency band to obtain a first S parameter; calculating, according to the first S parameter, an intrinsic capacitance value of a two-port on-wafer calibration piece circuit model corresponding to the single-port on-wafer calibration piece circuit model; measuring the two-port on-wafer calibration piece circuit model corresponding to the terahertz frequency band to obtain a second S parameter; and calculating a parasitic capacitance value and a parasitic resistance value of the two-port on-wafer calibration piece circuit model according to the second S parameter and the intrinsic capacitance value.


Find Patent Forward Citations

Wang, Yibang. (2023). Two-port on-wafer calibration piece circuit model and method for determining parameters (U.S. Patent No. 11733298). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11733298

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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