The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2023
Filed:
Mar. 03, 2021
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Tsu Ching Yang, Taipei, TW;
Sheng-Chih Lai, Hsinchu County, TW;
Yu-Wei Jiang, Hsinchu, TW;
Kuo-Chang Chiang, Hsinchu, TW;
Hung-Chang Sun, Kaohsiung, TW;
Chen-Jun Wu, Hsinchu, TW;
Feng-Cheng Yang, Zhudong Township, TW;
Chung-Te Lin, Tainan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A memory device includes a stack of gate electrode layers and interconnect layers arranged over a substrate. A first memory cell that is arranged over the substrate includes a first source/drain conductive lines and a second source/drain conductive line extending vertically through the stack of gate electrode layers. A channel layer and a memory layer are arranged on outer sidewalls of the first and second source/drain conductive lines. A first barrier structure is arranged between the first and second source/drain conductive lines. A first protective liner layer separates the first barrier structure from each of the first and second source/drain conductive lines. A second barrier structure is arranged on an opposite side of the first source/drain conductive line and is spaced apart from the first source/drain conductive line by a second protective liner layer.