The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Nov. 08, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Kun-Yu Lee, Tainan, TW;

Huicheng Chang, Tainan, TW;

Che-Hao Chang, Hsinchu, TW;

Ching-Hwanq Su, Tainan, TW;

Weng Chang, Hsinchu, TW;

Xiong-Fei Yu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823857 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 21/0228 (2013.01); H01L 21/02178 (2013.01); H01L 21/02192 (2013.01); H01L 21/28185 (2013.01); H01L 21/3115 (2013.01); H01L 21/31111 (2013.01);
Abstract

Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlO). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.


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