The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2023

Filed:

Feb. 25, 2021
Applicant:

Cambridge Electronics, Inc., Cambridge, MA (US);

Inventors:

Bin Lu, Watertown, MA (US);

Dongfei Pei, Waban, MA (US);

Mark Dipsey, Somerville, MA (US);

Hal Emmer, Wayland, MA (US);

Assignee:

Finwave Semiconductor, Inc., Belmont, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/43 (2006.01); H01L 29/40 (2006.01); H01L 29/778 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/432 (2013.01); H01L 29/402 (2013.01); H01L 29/42312 (2013.01); H01L 29/778 (2013.01);
Abstract

This disclosure describes the structure of a transistor that provides improved performance by reducing the off-state capacitance between the source and the drain by using a cap layer to extend the electrical distance between the gate and the source and drain contacts. In certain embodiments, a dielectric layer may be disposed between the gate electrode and the cap layer and vias are created in the dielectric layer to allow the gate electrode to contact the cap layer at select locations. In some embodiments, the gate electrode is offset from the cap layer to allow a more narrow cap layer and to allow additional space between the gate electrode and the drain contact facilitating the inclusion of a field plate. The gate electrode may be configured to only contact a portion of the cap layer.


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