The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Apr. 26, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Benjamin Buford, Hillsboro, OR (US);

Angeline Smith, Hillsboro, OR (US);

Noriyuki Sato, Hillsboro, OR (US);

Tanay Gosavi, Hillsboro, OR (US);

Kaan Oguz, Portland, OR (US);

Christopher Wiegand, Portland, OR (US);

Kevin O'brien, Portland, OR (US);

Tofizur Rahman, Portland, OR (US);

Gary Allen, Portland, OR (US);

Sasikanth Manipatruni, Portland, OR (US);

Emily Walker, Santa Clara, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); H10N 50/10 (2023.01); H10N 52/00 (2023.01); H10N 52/01 (2023.01); H10N 52/80 (2023.01);
U.S. Cl.
CPC ...
H10B 61/22 (2023.02); H10N 50/10 (2023.02); H10N 52/00 (2023.02); H10N 52/01 (2023.02); H10N 52/80 (2023.02);
Abstract

A memory apparatus includes a first electrode having a spin orbit material. The memory apparatus further includes a first memory device on a portion of the first electrode and a first dielectric adjacent to a sidewall of the first memory device. The memory apparatus further includes a second memory device on a portion of the first electrode and a second dielectric adjacent to a sidewall of the second memory device. A second electrode is on and in contact with a portion of the first electrode, where the second electrode is between the first memory device and the second memory device. The second electrode has a lower electrical resistance than an electrical resistance of the first electrode. The memory apparatus further includes a first interconnect structure and a second interconnect, each coupled with the first electrode.


Find Patent Forward Citations

Loading…