The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2023
Filed:
Aug. 20, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Lai Guan Tang, Tanjung Bungah, MY;
Ankireddy Nalamalpu, Portland, OR (US);
Dheeraj Subbareddy, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2020.01); H01L 25/065 (2006.01); H03K 19/17704 (2020.01); H03K 19/17724 (2020.01); H03K 19/1776 (2020.01); H03K 19/17736 (2020.01); G06F 30/30 (2020.01); G06F 30/32 (2020.01); G06F 30/34 (2020.01);
U.S. Cl.
CPC ...
H03K 19/17704 (2013.01); G06F 30/30 (2020.01); G06F 30/32 (2020.01); G06F 30/34 (2020.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H03K 19/1776 (2013.01); H03K 19/17724 (2013.01); H03K 19/17736 (2013.01);
Abstract
Systems and methods related to multi-die integrated circuits that may include dies having high-speed core interconnects. The high-speed core interconnects may be used to directly connect two adjacent dies.
Tang, Lai. (2023). High-speed core interconnect for multi-die programmable logic devices (U.S. Patent No. 11621713). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11621713
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile