The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

Jul. 07, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tai-Yen Peng, Hsinchu, TW;

Hui-Hsien Wei, Taoyuan, TW;

Wei-Chih Wen, Hsinchu County, TW;

Pin-Ren Dai, Hsinchu County, TW;

Chien-Min Lee, Hsinchu County, TW;

Han-Ting Tsai, Kaohsiung, TW;

Jyu-Horng Shieh, Hsinchu, TW;

Chung-Te Lin, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 43/02 (2006.01); H01L 43/12 (2006.01); H01L 27/22 (2006.01);
U.S. Cl.
CPC ...
H01L 45/148 (2013.01); H01L 27/228 (2013.01); H01L 27/2436 (2013.01); H01L 27/2472 (2013.01); H01L 27/2481 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01); H01L 45/08 (2013.01); H01L 45/085 (2013.01); H01L 45/1233 (2013.01); H01L 45/1266 (2013.01); H01L 45/146 (2013.01); H01L 45/1616 (2013.01); H01L 45/1675 (2013.01);
Abstract

An IC structure comprises a substrate, a first material layer, a second material layer, a first via structure, and a memory cell structure. The substrate comprises a memory region and a logic region. The first material layer is disposed on the memory region and the logic region. The second material layer is disposed on the first material layer only at the memory region. The first via structure formed in the first material layer and the second material layer. The memory cell structure is over the first via structure.


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