The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Oct. 06, 2020
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Tao Wang, Wuhan, CN;

Si Ping Hu, Wuhan, CN;

Jia Wen Wang, Wuhan, CN;

Shi Qi Huang, Wuhan, CN;

Jifeng Zhu, Wuhan, CN;

Jun Chen, Wuhan, CN;

Zi Qun Hua, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/00 (2006.01); H01L 27/11568 (2017.01); H01L 21/768 (2006.01); H01L 25/00 (2006.01); H01L 27/11573 (2017.01); H01L 25/18 (2006.01); H01L 27/11582 (2017.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 21/76895 (2013.01); H01L 23/528 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 24/08 (2013.01); H01L 24/27 (2013.01); H01L 24/83 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 27/11568 (2013.01); H01L 27/11573 (2013.01); H01L 27/11582 (2013.01); H01L 2224/0362 (2013.01); H01L 2224/03616 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/83895 (2013.01); H01L 2224/83896 (2013.01); H01L 2924/14511 (2013.01);
Abstract

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first interconnect layer including first interconnects is formed above a first substrate. A first bonding layer including first bonding contacts is formed above the first interconnect layer, such that each first interconnect is in contact with a respective first bonding contact. A second interconnect layer including second interconnects is formed above a second substrate. A second bonding layer including second bonding contacts is formed above the second interconnect layer, such that at least one second bonding contact is in contact with a respective second interconnect, and at least another second bonding contact is separated from the second interconnects. The first and second substrates are bonded in a face-to-face manner, such that each first bonding contact is in contact with one second bonding contact at a bonding interface.


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