The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Jan. 26, 2021
Applicant:

Orient Semiconductor Electronics, Limited, Kaohsiung, TW;

Inventors:

Yueh-Ming Tung, Kaohsiung, TW;

Chia-Ming Yang, Kaohsiung, TW;

Jung-Wei Chen, Kaohsiung, TW;

Jian-De Leu, Kaohsiung, TW;

Guan-Lin Pan, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/36 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 21/50 (2006.01);
U.S. Cl.
CPC ...
H01L 23/36 (2013.01); H01L 21/50 (2013.01); H01L 23/31 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01);
Abstract

The present disclosure provides a semiconductor package. The semiconductor package includes a redistribution layer, a die, a heat spreader, a thermal interface material and a molding layer. The die is disposed on the redistribution layer. The heat spreader is disposed on the die. The thermal interface material is applied between the heat spreader and the die. The molding layer is formed on the redistribution layer to enclose the die. The present disclosure further provides a method of manufacturing the above semiconductor package.


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