The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Apr. 01, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Shih-Kang Fu, Taoyuan County, TW;

Ming-Han Lee, Taipei, TW;

Shau-Lin Shue, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/76807 (2013.01); H01L 21/76816 (2013.01); H01L 21/76831 (2013.01); H01L 21/76832 (2013.01); H01L 21/76877 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 23/5283 (2013.01); H01L 23/53252 (2013.01); H01L 27/0886 (2013.01);
Abstract

The present disclosure provides a method for forming semiconductor structures. The method includes providing a device having a substrate, a first dielectric layer over the substrate, and a first conductive feature over the first dielectric layer, the first conductive feature comprising a first metal, the first metal being a noble metal. The method also includes depositing a second dielectric layer over the first dielectric layer and covering at least sidewalls of the first conductive feature; etching the second dielectric layer to form a trench; and forming a second conductive feature in the trench. The second conductive feature comprises a second metal different from the first metal.


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