The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Jul. 27, 2020
Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Uzma Rana, Slingerlands, NY (US);

Anthony K. Stamper, Burlington, VT (US);

Johnatan A. Kantarovsky, South Burlington, VT (US);

Steven M. Shank, Jericho, VT (US);

Siva P. Adusumilli, Burlington, VT (US);

Assignee:

GLOBALFOUNDRIES U.S. INC., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/763 (2006.01); H01L 21/8234 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0653 (2013.01); H01L 21/763 (2013.01); H01L 21/76264 (2013.01); H01L 21/823481 (2013.01); H01L 29/1095 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01); H01L 29/7841 (2013.01);
Abstract

The present disclosure relates to semiconductor structures and, more particularly, to a transistor with an embedded isolation layer in a bulk substrate and methods of manufacture. The structure includes: a bulk substrate; an isolation layer embedded within the bulk substrate and below a top surface of the bulk substrate; a deep trench isolation structure extending through the bulk substrate and contacting the embedded isolation layer; and a gate structure over the top surface of the bulk substrate and vertically spaced away from the embedded isolation layer, the deep trench isolation structure and the embedded isolation layer defining an active area of the gate structure in the bulk substrate.


Find Patent Forward Citations

Loading…