The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2022

Filed:

Oct. 31, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Wilfred Gomes, Portland, OR (US);

Mauro J. Kobrinsky, Portland, OR (US);

Abhishek A. Sharma, Hillsboro, OR (US);

Tahir Ghani, Portland, OR (US);

Doug Ingerly, Portland, OR (US);

Rajesh Kumar, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10805 (2013.01); H01L 27/10867 (2013.01);
Abstract

Described herein are IC devices that include transistors with contacts to one of the source/drain (S/D) regions being on the front side of the transistors and contacts to the other one of the S/D regions being on the back side of the transistors (i.e., 'back-side contacts'). Using transistors with one front-side and one back-side S/D contacts provides advantages and enables unique architectures that were not possible with conventional front-end-of-line transistors with both S/D contacts being on one side.


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