The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2022

Filed:

Oct. 30, 2019
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Markus Dinkel, Unterhaching, DE;

Petteri Palm, Regensburg, DE;

Eung San Cho, Torrance, CA (US);

Josef Hoeglauer, Heimstetten, DE;

Ralf Otremba, Kaufbeuren, DE;

Fabian Schnoy, Regenstauf, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/492 (2006.01); H01L 23/538 (2006.01); H01L 25/16 (2006.01);
U.S. Cl.
CPC ...
H01L 23/492 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 24/08 (2013.01); H01L 24/89 (2013.01); H01L 25/16 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/80801 (2013.01);
Abstract

In an embodiment, a semiconductor package includes a package footprint having a plurality of solderable contact pads, a semiconductor device having a first power electrode and a control electrode on a first surface and a second power electrode on a second surface, a redistribution substrate having an insulating board, wherein the first power electrode and the control electrode are mounted on a first major surface of the insulating board and the solderable contact pads of the package footprint are arranged on a second major surface of the insulating board, and a contact clip having a web portion and one or more peripheral rim portions. The web portion is mounted on and electrically coupled to the second power electrode and the peripheral rim portion is mounted on the first major surface of the insulating board.


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