The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2022

Filed:

Dec. 12, 2018
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Meng Yan, Wuhan, CN;

Jia Wen Wang, Wuhan, CN;

Si Ping Hu, Wuhan, CN;

Shun Hu, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/544 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 27/11575 (2017.01); G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); G03F 9/7049 (2013.01); G03F 9/7088 (2013.01); G03F 9/7092 (2013.01); H01L 23/544 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 27/11575 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 2223/54426 (2013.01); H01L 2224/04 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05657 (2013.01); H01L 2224/05684 (2013.01); H01L 2224/05686 (2013.01); H01L 2224/08121 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/8013 (2013.01); H01L 2224/80132 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/80905 (2013.01); H01L 2224/80908 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06565 (2013.01);
Abstract

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.


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