The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2022

Filed:

Mar. 24, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sudipto Naskar, Portland, OR (US);

Manish Chandhok, Beaverton, OR (US);

Abhishek A. Sharma, Hillsboro, OR (US);

Roman Caudillo, Portland, OR (US);

Scott B. Clendenning, Portland, OR (US);

Cheyun Lin, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 49/02 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 28/87 (2013.01); H01L 27/10808 (2013.01); H01L 27/10852 (2013.01);
Abstract

Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.


Find Patent Forward Citations

Naskar, Sudipto. (2022). Capacitor architectures in semiconductor devices (U.S. Patent No. 11264449). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11264449

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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