The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2022

Filed:

Jan. 21, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tsung-Yuan Yu, Taipei, TW;

Cheng-Chieh Hsieh, Tainan, TW;

Hung-Yi Kuo, Taipei, TW;

Hao-Yi Tsai, Hsinchu, TW;

Ming-Hung Tseng, Miaoli County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/56 (2013.01); H01L 21/76804 (2013.01); H01L 23/3121 (2013.01); H01L 25/0657 (2013.01);
Abstract

A package structure includes a first semiconductor die, an insulating encapsulant, a plurality of first through insulator vias, a plurality of second through insulator vias, and a redistribution layer. The insulating encapsulant is encapsulating the first semiconductor die. The first through insulator vias are located in a central area of the insulating encapsulant surrounding the first semiconductor die. The second through insulator vias are located in a peripheral area of the insulating encapsulant surrounding the plurality of first through insulator vias located in the central area, wherein an aspect ratio of the plurality of second through insulator vias is greater than an aspect ratio of the plurality of first through insulator vias. The redistribution layer is disposed on the insulating encapsulant and electrically connected to the first semiconductor die, the plurality of first through insulator vias and the plurality of second through insulator vias.


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