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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11227788 B1

PDFFull Text
Date of Patent:
Jan. 18, 2022

Filed:

Jul. 06, 2020

Method of forming isolation layer

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Teng-Chun Tsai, Hsinchu, TW;

Bing-Hung Chen, Taipei County, TW;

Chien-Hsun Wang, Hsinchu, TW;

Cheng-Tung Lin, Hsinchu County, TW;

Chih-Tang Peng, Hsinchu County, TW;

De-Fang Chen, Hsinchu, TW;

Huan-Just Lin, Hsinchu, TW;

Li-Ting Wang, Hsinchu, TW;

Yung-Cheng Lu, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

Attorney:

McDermott Will & Emery LLP

Primary Examiner:

Michael M Trinh

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/3105 (2006.01); H01L 29/78 (2006.01); H01L 21/311 (2006.01); B82Y 10/00 (2011.01); H01L 21/8238 (2006.01); H01L 29/423 (2006.01); H01L 29/775 (2006.01); H01L 29/06 (2006.01); H01L 29/41 (2006.01);
U.S. Cl.
CPC ...
H01L 21/762 (2013.01); B82Y 10/00 (2013.01); H01L 21/31053 (2013.01); H01L 21/31055 (2013.01); H01L 21/31116 (2013.01); H01L 21/76224 (2013.01); H01L 21/823885 (2013.01); H01L 29/0676 (2013.01); H01L 29/413 (2013.01); H01L 29/42372 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66666 (2013.01); H01L 29/775 (2013.01); H01L 29/7827 (2013.01); H01L 21/823842 (2013.01);
Abstract

According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.

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