The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2021

Filed:

Jul. 23, 2018
Applicant:

Amkor Technology, Inc., Tempe, AZ (US);

Inventors:

Jae Ung Lee, Seoul, KR;

Yung Woo Lee, Anyang-si, KR;

EunNaRa Cho, Seoul, KR;

Dong Hyun Bang, Seoul, KR;

Wook Choi, Seoul, KR;

KooWoong Jeong, Seoul, KR;

Byong Jin Kim, Bucheon-si, KR;

Min Chul Shin, Bucheon-si, KR;

Ho Jeong Lim, Seoul, KR;

Ji Hyun Kim, Seoul, KR;

Chang Hun Kim, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/16 (2006.01); H01L 23/13 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 23/50 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 23/13 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/5389 (2013.01); H01L 25/16 (2013.01); H01L 23/3128 (2013.01); H01L 23/50 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 25/0655 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/16237 (2013.01); H01L 2924/1432 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/15159 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19103 (2013.01); H01L 2924/19106 (2013.01);
Abstract

A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.


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