The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2021
Filed:
Oct. 09, 2019
Applied Materials, Inc., Santa Clara, CA (US);
Zhijun Jiang, Sunnyvale, CA (US);
Ganesh Balasubramanian, Fremont, CA (US);
Arkajit Roy Barman, Singapore, SG;
Hidehiro Kojiri, Sunnyvale, CA (US);
Xinhai Han, Santa Clara, CA (US);
Deenesh Padhi, Sunnyvale, CA (US);
Chuan Ying Wang, Sunnyvale, CA (US);
Yue Chen, Sunnyvale, CA (US);
Daemian Raj Benjamin Raj, Fremont, CA (US);
Nikhil Sudhindrarao Jorapur, Sunnyvale, CA (US);
Vu Ngoc Tran Nguyen, Santa Clara, CA (US);
Miguel S. Fung, Sunnyvale, CA (US);
Jose Angelo Olave, Angeles, PH;
Thian Choi Lim, Singapore, SG;
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.