The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

May. 16, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tsung-Fu Tsai, Changhua County, TW;

Shih-Ting Lin, Taipei, TW;

Szu-Wei Lu, Hsinchu, TW;

Ying-Ching Shih, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/04 (2014.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2221/68372 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06586 (2013.01);
Abstract

A semiconductor package includes a first integrated circuit structure, a second integrated circuit structure, a plurality of conductive bumps, an encapsulating material, and a redistribution structure. The first integrated circuit structure includes an active surface having a plurality of contact pads, a back surface opposite to the active surface, and a plurality of through vias extending through the first integrated circuit structure and connecting the active surface and the back surface. The second integrated circuit structure is disposed on the back surface of the first integrated circuit structure. The conductive bumps are disposed between the first integrated circuit structure and the second integrated circuit structure, and electrically connecting the plurality of through vias and the second integrated circuit structure. The encapsulating material at least encapsulates the second integrated circuit structure. The redistribution structure is disposed over and electrically connected to the active surface of the first integrated circuit structure.


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