The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2021

Filed:

Dec. 12, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Joshua M. Rubin, Albany, NY (US);

Arvind Kumar, Chappaqua, NY (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Steven Lorenz Wright, Tucson, AZ (US);

Wiren Dale Becker, Hyde Park, NY (US);

Xiao Hu Liu, Briarcliff Manor, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/34 (2006.01); H01L 21/00 (2006.01); H01L 21/4763 (2006.01); H01L 23/538 (2006.01); H01L 25/18 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5383 (2013.01); H01L 21/4846 (2013.01); H01L 23/49838 (2013.01); H01L 23/5386 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/24 (2013.01); H01L 24/49 (2013.01); H01L 24/81 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/16157 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A multi-chip package structure includes a package substrate, an interconnect bridge device, first and second integrated circuit chips, and a connection structure. The first integrated circuit chip is flip-chip attached to at least the interconnect bridge device. The second integrated circuit chip is flip-chip attached to the interconnect bridge device and to the package substrate. The interconnect bridge device includes (i) wiring that is configured to provide chip-to-chip connections between the first and second integrated circuit chips and (ii) an embedded power distribution network that is configured to distribute at least one of a positive power supply voltage and a negative power supply voltage to at least one of the first and second integrated circuit chips attached to the interconnect bridge device. The connection structure (e.g., wire bond, injection molded solder, etc.) connects the embedded power distribution network to a power supply voltage contact of the package substrate.


Find Patent Forward Citations

Loading…