The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 2021
Filed:
Jan. 13, 2020
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Kai-Hsuan Lee, Hsinchu, TW;
Chia-Ta Yu, New Taipei, TW;
Cheng-Yu Yang, Xihu Township, TW;
Sheng-Chen Wang, Hsinchu, TW;
Bo-Yu Lai, Taipei, TW;
Bo-Cyuan Lu, New Taipei, TW;
Chi On Chui, Hsinchu, TW;
Sai-Hooi Yeong, Zhubei, TW;
Feng-Cheng Yang, Zhudong Township, TW;
Yen-Ming Chen, Chu-Pei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A method includes forming a gate dielectric layer on a semiconductor fin, and forming a gate electrode over the gate dielectric layer. The gate electrode extends on sidewalls and a top surface of the semiconductor fin. A gate spacer is selectively deposited on a sidewall of the gate electrode. An exposed portion of the gate dielectric layer is free from a same material for forming the gate spacer deposited thereon. The method further includes etching the gate dielectric layer using the gate spacer as an etching mask to expose a portion of the semiconductor fin, and forming an epitaxy semiconductor region based on the semiconductor fin.