The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 2021

Filed:

Jun. 17, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hung-Jui Kuo, Hsinchu, TW;

Hui-Jung Tsai, Hsinchu, TW;

Jyun-Siang Peng, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/024 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/13024 (2013.01);
Abstract

The present disclosure provides a method of manufacturing a semiconductor package. Semiconductor dies having conductive pillars are provided and are encapsulated with an insulating encapsulant. A redistribution circuit structure is formed on the insulating encapsulant and the semiconductor dies, and the redistribution circuit structure is electrically connected to the semiconductor dies. A photosensitive mask pattern having a plurality of openings is formed. A plurality of conductive vias is formed within the openings of the photosensitive mask pattern. A dielectric layer is then formed, and the conductive vias are embedded in the dielectric layer.


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