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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11121040 B1

PDFFull Text
Date of Patent:
Sep. 14, 2021

Filed:

Sep. 30, 2016

Multi voltage threshold transistors through process and design-induced multiple work functions

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Chen-Guan Lee, Portland, OR (US);

Everett S. Cassidy-Comfort, Beaverton, OR (US);

Joodong Park, Portland, OR (US);

Walid M. Hafez, Portland, OR (US);

Chia-Hong Jan, Portland, OR (US);

Rahul Ramaswamy, Portland, OR (US);

Neville L. Dias, Hillsboro, OR (US);

Hsu-Yu Chang, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Schwabe, Williamson & Wyatt, P.C.

Primary Examiner:

Christine A Enad

Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 21/28 (2006.01); H01L 21/3213 (2006.01); H01L 21/265 (2006.01); H01L 21/3115 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 27/088 (2006.01); H01L 29/10 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/82385 (2013.01); H01L 21/26586 (2013.01); H01L 21/28088 (2013.01); H01L 21/31155 (2013.01); H01L 21/32134 (2013.01); H01L 21/32139 (2013.01); H01L 21/82345 (2013.01); H01L 21/823431 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/823842 (2013.01); H01L 21/845 (2013.01); H01L 27/0886 (2013.01); H01L 27/0922 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 29/1054 (2013.01); H01L 29/42376 (2013.01); H01L 29/4966 (2013.01); H01L 29/66 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 21/823437 (2013.01); H01L 21/823456 (2013.01); H01L 27/0207 (2013.01);
Abstract

An apparatus comprising at least one transistor in a first area of a substrate and at least one transistor in a second area, a work function material on a channel region of each of the at least one transistor, wherein an amount of work function material in the first area is different than an amount of work function material in the second area. A method comprising depositing a work function material and a masking material on at least one transistor body in a first area and at least one in a second area; removing less than an entire portion of the masking material so that the portion of the work function material that is exposed in the first area is different than that exposed in the second area; removing the exposed work function material; and forming a gate electrode on each of the at least one transistor bodies.

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