The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 01, 2021
Filed:
Apr. 18, 2019
International Business Machines Corporation, Armonk, NY (US);
Adra Carr, Albany, NY (US);
Vimal Kamineni, Mechanicville, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Andrew Greene, Slingerlands, NY (US);
Nigel Cave, Saratoga Springs, NY (US);
Veeraraghavan Basker, Schenectady, NY (US);
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
Abstract
Embodiments of the present invention are directed to reducing the effective capacitance between active devices at the contact level. In a non-limiting embodiment of the invention, an interlayer dielectric is replaced with a low-k material without damaging a self-aligned contact (SAC) cap. A gate can be formed over a channel region of a fin. The gate can include a gate spacer and a SAC cap. Source and drain regions can be formed adjacent to the channel region. A contact is formed on the SAC cap and on surfaces of the source and drain regions. A first dielectric layer can be recessed to expose a sidewall of the contact and a sidewall of the gate spacer. A second dielectric layer can be formed on the recessed surface of the first dielectric layer. The second dielectric layer can include a dielectric material having a dielectric constant less than the first dielectric layer.