The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Jul. 18, 2019
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Bernd Waidhas, Pettendorf, DE;

Georg Seidemann, Landshut, DE;

Andreas Augustin, Munich, DE;

Laurent Millou, Munich, DE;

Andreas Wolter, Regensburg, DE;

Reinhard Mahnkopf, Oberhaching, DE;

Stephan Stoeckl, Schwandorf, DE;

Thomas Wagner, Regelsbach, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 25/065 (2006.01); H01L 21/48 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 23/427 (2006.01); G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/486 (2013.01); H01L 23/481 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); G06F 15/76 (2013.01); H01L 23/427 (2013.01); H01L 2224/16225 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06572 (2013.01); H01L 2225/1011 (2013.01); H01L 2225/1017 (2013.01); H01L 2225/1058 (2013.01);
Abstract

A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.


Find Patent Forward Citations

Loading…