The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2021
Filed:
Nov. 04, 2019
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Hsin-Ting Huang, Bade, TW;
Hsiang-Fu Chen, Zhubei, TW;
Wen-Chuan Tai, Hsinchu, TW;
Chia-Ming Hung, Taipei, TW;
Shao-Chi Yu, Hsinchu, TW;
Hung-Hua Lin, Taipei, TW;
Yuan-Chih Hsieh, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu, TW;
Abstract
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.