The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2020
Filed:
Aug. 07, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
The present disclosure provides a method of fabricating an integrated fan-out package including the following steps. A semiconductor die is laterally encapsulated by an insulating encapsulant. A redistribution circuit structure is formed on the insulating encapsulant and the semiconductor die, and the redistribution circuit structure is electrically connected to the semiconductor die. A forming method of the redistribution circuit structure includes the following steps. A conductive wiring is formed over the insulating encapsulant and the semiconductor die. A dielectric material is formed on the insulating encapsulant and the semiconductor die to cover the conductive wiring. A sacrificial layer is formed on the dielectric material, wherein a first top surface of the sacrificial layer is flatter than a second top surface of the dielectric material. The sacrificial layer and a portion of the dielectric material are removed until the conductive wiring is revealed to form a dielectric layer, wherein the conductive wiring is embedded in the dielectric layer.