The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Sep. 10, 2018
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, Hubei, CN;

Inventors:

Zhenyu Lu, Hubei, CN;

Yu Ru Huang, Hubei, CN;

Qian Tao, Hubei, CN;

Yushi Hu, Hubei, CN;

Jun Chen, Hubei, CN;

Xiaowang Dai, Hubei, CN;

Jifeng Zhu, Hubei, CN;

Yongna Li, Hubei, CN;

Lidong Song, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 21/033 (2006.01); H01L 27/11565 (2017.01); H01L 23/532 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/0337 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 29/40117 (2019.08); H01L 23/53295 (2013.01);
Abstract

A method for forming a 3D memory device is disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a plurality of channel holes penetrating the alternating dielectric stack; forming a channel structure in each channel hole; forming a channel column structure on the channel structure in each channel hole; trimming an upper portion of each channel column structure to form a channel plug; and forming a top selective gate cut between neighboring channel plugs.


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