The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2020
Filed:
Nov. 29, 2018
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
Sung-Kwan Kang, San Jose, CA (US);
Gill Yong Lee, San Jose, CA (US);
Sang Ho Yu, Cupertino, CA (US);
Shih Chung Chen, Cupertino, CA (US);
Jeffrey W. Anthis, San Jose, CA (US);
Assignee:
APPLIED MATERIALS, INC., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 21/321 (2006.01); H01L 21/02 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10823 (2013.01); H01L 21/28088 (2013.01); H01L 21/32135 (2013.01); H01L 27/10876 (2013.01); H01L 27/10891 (2013.01); H01L 29/42372 (2013.01); H01L 29/4966 (2013.01); H01L 21/0228 (2013.01); H01L 21/02274 (2013.01); H01L 21/3212 (2013.01); H01L 29/42364 (2013.01);
Abstract
Memory devices and methods of forming memory devices are described. The memory devices comprise two work-function metal layers, where one work-function layer has a lower work-function than the other work-function layer. The low work-function layer may reduce gate-induced drain leakage current losses. Methods of forming memory devices are also described.