The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Sep. 28, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

George R. Mulfinger, Gansevoort, NY (US);

Lakshmanan H. Vanamurthy, Saratoga Springs, NY (US);

Scott Beasor, Greenwich, NY (US);

Timothy J. McArdle, Ballston Lake, NY (US);

Judson R. Holt, Ballston Lake, NY (US);

Hao Zhang, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 29/08 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 21/02 (2006.01); H01L 29/167 (2006.01); H01L 21/285 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/45 (2006.01); H01L 23/485 (2006.01); H01L 21/768 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/02532 (2013.01); H01L 21/26513 (2013.01); H01L 21/76897 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823871 (2013.01); H01L 23/485 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/167 (2013.01); H01L 29/41791 (2013.01); H01L 29/456 (2013.01); H01L 29/665 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method for forming a self-aligned sacrificial epitaxial cap for trench silicide and the resulting device are provided. Embodiments include a Si fin formed in a PFET region; a pair of Si fins formed in a NFET region; epitaxial S/D regions formed on ends of the Si fins; a replacement metal gate formed over the Si fins in the PFET and NFET regions; metal silicide trenches formed over the epitaxial S/D regions in the PFET and NEFT regions; a metal layer formed over top surfaces of the S/D region in the PFET region and top and bottom surfaces of the S/D regions in the NFET region, wherein the epitaxial S/D regions in the PFET and NFET regions are diamond shaped in cross-sectional view.


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