The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Jan. 18, 2019
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
He Ren, San Jose, CA (US);
Feiyue Ma, San Jose, CA (US);
Yu Lei, Belmont, CA (US);
Kai Wu, Palo Alto, CA (US);
Mehul B. Naik, San Jose, CA (US);
Zhiyuan Wu, San Jose, CA (US);
Vikash Banthia, Los Altos, CA (US);
Hua Ai, Tracy, CA (US);
Assignee:
Applied Materials, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/285 (2006.01); H01L 23/532 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); H01L 21/28562 (2013.01); H01L 21/76816 (2013.01); H01L 21/76831 (2013.01); H01L 21/76834 (2013.01); H01L 23/5226 (2013.01); H01L 23/53209 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53257 (2013.01);
Abstract
Interconnects and methods for forming interconnects are described and disclosed herein. The interconnect contains a stack formed on a substrate having a via and a trench formed therein, a first metal formed from a first material of a first type deposited in the via, and a second metal formed from a second material of a second type deposited in the trench.