The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Mar. 18, 2019
Tokyo Electron Limited, Minato-ku, Tokyo, JP;
Robert Clark, Albany, NY (US);
Richard Farrell, Albany, NY (US);
Kandabara Tapily, Albany, NY (US);
Angelique Raley, Albany, NY (US);
Sophie Thibaut, Albany, NY (US);
Tokyo Electron Limited, Tokyo, JP;
Abstract
A method is provided for self-aligned multi-patterning on a semiconductor workpiece using an integrated sequence of processing steps executed on a common manufacturing platform hosting film-forming modules, etching modules, and transfer modules. A workpiece having a mandrel pattern formed thereon is received into the common manufacturing platform. A sidewall spacer pattern is formed based, at least in part, on the mandrel pattern, the sidewall spacer pattern having a plurality of second features separated by a second pitch distance with the first pitch distance being greater than the second pitch distance. The integrated sequence of processing steps is executed within the common manufacturing platform without leaving the controlled environment and the transfer modules are used to transfer the workpiece between the processing modules while maintaining the workpiece within the controlled environment. Broadly, using selective/conformal deposition, etching, or implanting techniques to form a sidewall spacer pattern on a common manufacturing platform.