The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Oct. 05, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Ming-Feng Shieh, Yongkang, TW;

Hung-Chang Hsieh, Hsin-Chu, TW;

Wen-Hung Tseng, Luodong Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 29/417 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 29/49 (2006.01); H01L 29/43 (2006.01); H01L 27/092 (2006.01); H01L 29/51 (2006.01); H01L 21/321 (2006.01); H01L 23/532 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 23/485 (2006.01); H01L 21/4763 (2006.01); H01L 21/3105 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/28079 (2013.01); H01L 21/28088 (2013.01); H01L 21/28141 (2013.01); H01L 21/3212 (2013.01); H01L 21/7684 (2013.01); H01L 21/7688 (2013.01); H01L 21/76816 (2013.01); H01L 21/76819 (2013.01); H01L 21/76831 (2013.01); H01L 21/76834 (2013.01); H01L 21/76846 (2013.01); H01L 21/76879 (2013.01); H01L 21/823425 (2013.01); H01L 21/823475 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 21/823871 (2013.01); H01L 21/823878 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53214 (2013.01); H01L 23/53233 (2013.01); H01L 23/53257 (2013.01); H01L 27/0924 (2013.01); H01L 29/41775 (2013.01); H01L 29/42372 (2013.01); H01L 29/435 (2013.01); H01L 29/4958 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 21/31055 (2013.01); H01L 21/4763 (2013.01); H01L 21/76852 (2013.01); H01L 21/76861 (2013.01); H01L 21/76865 (2013.01); H01L 21/76883 (2013.01); H01L 21/76885 (2013.01); H01L 21/823828 (2013.01); H01L 23/53295 (2013.01); H01L 29/66545 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.


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