The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jun. 01, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Eng Huat Goh, Ayer Itam, MY;

Bok Eng Cheah, Gelugor, MY;

Jackson Chung Peng Kong, Penang, MY;

Min Suet Lim, Penang, MY;

Khang Choong Yong, Puchong, MY;

Howe Yin Loo, Penang, MY;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 23/64 (2006.01); H01L 23/00 (2006.01); H01L 49/02 (2006.01); H01L 23/498 (2006.01); H01L 21/50 (2006.01); H01L 23/16 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 25/162 (2013.01); H01L 21/50 (2013.01); H01L 23/16 (2013.01); H01L 23/49838 (2013.01); H01L 23/562 (2013.01); H01L 23/642 (2013.01); H01L 23/647 (2013.01); H01L 28/40 (2013.01); H01L 23/3128 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/3511 (2013.01);
Abstract

Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having a stiffener that extends beyond a package substrate outer edge, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a package substrate having a first side, a second side opposite the first side, and an outer edge extending between the first side and the second side; an IC die coupled with the first side of the package substrate, where the IC die includes a power terminal; a stiffener coupled with the first side of the package substrate, where the stiffener surrounds the IC die and includes a conductive routing region coupled with the IC die power terminal, and a passive electronic device coupled with the conductive routing region. Other embodiments may be described and/or claimed.


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