The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2020
Filed:
Oct. 01, 2018
Applicant:
Yangtze Memory Technologies Co., Ltd., Wuhan, CN;
Inventors:
Hongtao Liu, Wuhan, CN;
Yongyan Xu, Wuhan, CN;
Ming Wang, Wuhan, CN;
Lei Jin, Wuhan, CN;
Zongliang Huo, Wuhan, CN;
Assignee:
YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/14 (2006.01); H01L 27/11582 (2017.01); G11C 11/56 (2006.01); G11C 16/08 (2006.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/34 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 11/5671 (2013.01); G11C 16/08 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract
Embodiments of 3D memory devices and methods for operating the 3D memory devices are disclosed. In an example, a 3D memory device includes a NAND memory string and a peripheral circuit. The NAND memory string extends vertically above a substrate and includes a plurality of memory cells arranged vertically in series. The peripheral circuit is configured to program the memory cells based on incremental step pulse programming (ISPP). Different verification voltages of the ISPP are applied to at least two of the memory cells.