The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Dec. 21, 2017
Applicant:

Tessera, Inc., San Jose, CA (US);

Inventors:

Toyohiro Aoki, Kawasaki, JP;

Takashi Hisada, Kawasaki, JP;

Akihiro Horibe, Kawasaki, JP;

Sayuri Hada, Kawasaki, JP;

Eiji I. Nakamura, Kawasaki, JP;

Kuniaki Sueoka, Kawasaki, JP;

Assignee:

Tessera, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 2224/11 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/81192 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1579 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15788 (2013.01); H01L 2924/351 (2013.01);
Abstract

A via structure for electric connection is disclosed. The via structure includes a substrate that has a first surface and a via hole opened to the first surface. The via structure includes also a stress buffer layer disposed on the first surface of the substrate, which has an opening aligned to the via hole of the substrate. The via structure further includes a conductive body formed in the via hole of the substrate at least up to the level of the first surface of the substrate. In the via structure, the stress buffer layer receives the conductive body extending into the opening over the level of the first surface of the substrate and/or covers, at least in part, the edge of the first surface around the via hole of the substrate.


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