The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Oct. 22, 2017
Applicant:

Kla-tencor Corporation, Milpitas, CA (US);

Inventors:

Tzahi Grunzweig, Hillsboro, OR (US);

Nadav Gutman, Zichron Ya'aqov, IL;

David Gready, Tel Aviv, IL;

Mark Ghinovker, Yoqneam Ilit, IL;

Vladimir Levinski, Migdal HaEmek, IL;

Claire E. Staniunas, Forest Grove, OR (US);

Nimrod Shuall, Beaverton, OR (US);

Yuri Paskover, Binyamina, IL;

Assignee:

KLA-Tencor Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 7/00 (2017.01); G03G 15/00 (2006.01); G06T 7/73 (2017.01);
U.S. Cl.
CPC ...
G06T 7/0004 (2013.01); G03G 15/6561 (2013.01); G06T 7/73 (2017.01); G06T 2207/30148 (2013.01);
Abstract

Systems and methods are provided, which calculate overlay misregistration error estimations from analyzed measurements of each ROI (region of interest) in at least one metrology imaging target, and incorporate the calculated overlay misregistration error estimations in a corresponding estimation of overlay misregistration. Disclosed embodiments provide a graduated and weighted analysis of target quality which may be integrated in a continuous manner into the metrology measurement processes, and moreover evaluates target quality in terms of overlay misregistration, which forms a common basis for evaluation of errors from different sources, such as characteristics of production steps, measurement parameters and target characteristics. Such common basis then enables any of combining various error sources to give a single number associated with measurement fidelity, analyzing various errors at wafer, lot and process levels, and/or to trade-off the resulting accuracy for throughput by reducing the number of measurements, in a controlled manner.


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