The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Jun. 11, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yi-Huan Chen, Hsin Chu, TW;

Chien-Chih Chou, New Taipei, TW;

Ta-Wei Lin, Minxiong Township, TW;

Fu-Jier Fan, Hsinchu, TW;

Kong-Beng Thei, Pao-Shan Village, TW;

Yi-Sheng Chen, Hsinchu, TW;

Szu-Hsien Liu, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 21/76 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4916 (2013.01); H01L 21/76 (2013.01); H01L 21/76229 (2013.01); H01L 21/823437 (2013.01); H01L 27/088 (2013.01); H01L 29/0603 (2013.01); H01L 29/401 (2013.01); H01L 21/823481 (2013.01);
Abstract

In some embodiments, an integrated circuit is provided. The integrated circuit may include an inner ring-shaped isolation structure that is disposed in a semiconductor substrate. Further, the inner-ring shaped isolation structure may demarcate a device region. An inner ring-shaped well is disposed in the semiconductor substrate and surrounds the inner ring-shaped isolation structure. A plurality of dummy gates are arranged over the inner ring-shaped well. Moreover, the plurality of dummy gates are arranged within an interlayer dielectric layer.


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