The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Feb. 19, 2018
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Namchil Mun, Singapore, SG;

Jeoung Mo Koo, Singapore, SG;

Shiang Yang Ong, Singapore, SG;

Raj Verma Purakh, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0634 (2013.01); H01L 29/0847 (2013.01); H01L 29/402 (2013.01); H01L 29/41775 (2013.01); H01L 29/42376 (2013.01); H01L 29/4933 (2013.01); H01L 29/517 (2013.01); H01L 29/66522 (2013.01); H01L 29/66613 (2013.01); H01L 29/66636 (2013.01); H01L 29/7813 (2013.01); H01L 29/7816 (2013.01);
Abstract

A high voltage transistor with low on resistance is disclosed. The transistor may include at least one cut out region in the drift region under the drain of the transistor. The cut out region is devoid of the drift well which connects the drain to the channel. Cut out regions may be distributed along the width direction of the drain region of the transistor. The transistor may alternatively or further include a vertical polysilicon plate surrounding the device region. The vertical polysilicon plate may be implemented as a deep trench isolation region. The deep trench isolation region includes a deep trench lined with an insulation collar and filled with polysilicon. The vertical polysilicon plate reduces an on resistance to improve device performance.


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