The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Jul. 12, 2017
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Yu-Min Lin, Hsinchu County, TW;

Kuo-Shu Kao, Hsinchu, TW;

Jing-Yao Chang, New Taipei, TW;

Tao-Chih Chang, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/367 (2006.01); H05K 1/02 (2006.01); H01L 23/31 (2006.01); H01L 23/13 (2006.01); H05K 3/32 (2006.01); H05K 1/11 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 21/56 (2006.01); H01L 23/492 (2006.01); H01L 23/373 (2006.01); H01L 23/36 (2006.01); H01L 23/538 (2006.01); H05K 3/46 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H01L 25/10 (2006.01); H01L 21/48 (2006.01); H05K 3/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/367 (2013.01); H01L 21/565 (2013.01); H01L 23/13 (2013.01); H01L 23/3121 (2013.01); H01L 23/36 (2013.01); H01L 23/3735 (2013.01); H01L 23/492 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 25/0655 (2013.01); H05K 1/0204 (2013.01); H05K 1/115 (2013.01); H05K 3/32 (2013.01); H05K 3/4688 (2013.01); H01L 21/4857 (2013.01); H01L 23/5385 (2013.01); H01L 24/83 (2013.01); H01L 25/105 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/18 (2013.01); H01L 2224/211 (2013.01); H01L 2224/215 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/24247 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/838 (2013.01); H01L 2224/83192 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1094 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/35 (2013.01); H01L 2924/37001 (2013.01); H05K 1/0203 (2013.01); H05K 1/185 (2013.01); H05K 3/0047 (2013.01); H05K 3/108 (2013.01); H05K 2201/066 (2013.01); H05K 2201/09827 (2013.01); H05K 2201/10416 (2013.01);
Abstract

A chip packaging includes a substrate, a first chip, a molding material, a first circuit, and a second circuit. The substrate includes a bottom surface, a first top surface disposed above the bottom surface with a first height, and a second top surface disposed above the bottom surface with a second height. The first height is smaller than the second height. The first chip is disposed on the first top surface. The molding material is disposed on the substrate and covers the first chip. The first and second circuits are disposed on the molding material, and are respectively and electrically connected to the first chip and the second top surface of the substrate. The substrate is made of copper material with huge area and has the properties of high current withstand capacity and high thermal efficiency. The second top surface protects the first chip from damage.


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