The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2019
Filed:
Sep. 28, 2017
Intel Corporation, Santa Clara, CA (US);
Aleksandar Aleksov, Chandler, AZ (US);
Arnab Sarkar, Chandler, AZ (US);
Arghya Sain, Chandler, AZ (US);
Kristof Darmawikarta, Chandler, AZ (US);
Henning Braunisch, Phoenix, AZ (US);
Prashant D. Parmar, Gilbert, AZ (US);
Sujit Sharan, Chandler, AZ (US);
Johanna M. Swan, Scottsdale, AZ (US);
Feras Eid, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Aspects of the embodiments are directed to an IC chip that includes a substrate comprising a first metal layer, a second metal layer, and a ground plane residing on the first metal layer. The second metal layer can include a first signal trace, the first signal trace electrically coupled to a first signal pad residing in the first metal layer by a first signal via. The second metal layer can include a second signal trace, the second signal trace electrically coupled to a second signal pad residing in the first metal layer by a second signal via. The substrate can also include a ground trace residing in the second metal layer between the first signal trace and the second signal trace, the ground trace electrically coupled to the ground plane by a ground via. The vias coupled to the traces can include self-aligned or zero-misaligned vias.