The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2019
Filed:
May. 05, 2010
Hsien-pin HU, Zhubei, TW;
Chen-hua Yu, Hsin-Chu, TW;
Ming-fa Chen, Taichung, TW;
Jing-cheng Lin, Hsin-Chu, TW;
Jiun Ren Lai, Zhubei, TW;
Yung-chi Lin, Su-Lin, TW;
Hsien-Pin Hu, Zhubei, TW;
Chen-Hua Yu, Hsin-Chu, TW;
Ming-Fa Chen, Taichung, TW;
Jing-Cheng Lin, Hsin-Chu, TW;
Jiun Ren Lai, Zhubei, TW;
Yung-Chi Lin, Su-Lin, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure.