The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2019
Filed:
Feb. 12, 2018
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Ya-Lien Lee, Hsinchu County, TW;
Hung-Wen Su, Hsinchu County, TW;
Kuei-Pin Lee, New Taipei, TW;
Yu-Hung Lin, Taichung, TW;
Yu-Min Chang, Hsin-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/50 (2006.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76843 (2013.01); H01L 21/76802 (2013.01); H01L 21/76829 (2013.01); H01L 21/76879 (2013.01); H01L 23/50 (2013.01); H01L 23/53238 (2013.01); H01L 21/2855 (2013.01); H01L 21/28562 (2013.01); H01L 21/76807 (2013.01); H01L 23/53295 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A device comprises a semiconductor substrate; a dielectric layer deposited over the semiconductor substrate, the dielectric layer including a trench; and a structure in the trench. The structure includes a chemical vapor deposition (CVD) TaN layer formed on a side wall of the trench; a physical vapor deposition (PVD) Ta layer formed over the CVD TaN layer; and a metal-containing layer formed over the PVD Ta layer.