The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2019
Filed:
Feb. 05, 2018
Globalfoundries Inc., Grand Cayman, KY;
Julien Frougier, Albany, NY (US);
Ruilong Xie, Schenectady, NY (US);
Puneet H. Suvarna, Menands, NY (US);
Hiroaki Niimi, Cohoes, NY (US);
Steven J. Bentley, Menands, NY (US);
Ali Razavieh, Albany, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
The present disclosure relates generally to wrap around contact formation in source/drain regions of a semiconductor device such as an integrated circuit (IC), and more particularly, to stacked IC structures containing complementary FETs (CFETs) having wrap around contacts and methods of forming the same. Disclosed is a stacked IC structure including a first FET on a substrate, a second FET vertically stacked above the first FET, a dielectric layer above the second FET, and a spacer layer between FETs, wherein each FET has an electrically isolated wrap-around contact formed therearound.