The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Mar. 31, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ker-Hsiao Huo, Zhubei, TW;

Kong-Beng Thei, Hsinchu County, TW;

Chih-Wen Albert Yao, Hsinchu, TW;

Fu-Jier Fan, Hsinchu, TW;

Chen-Liang Chu, Hsinchu, TW;

Ta-Yuan Kung, New Taipei, TW;

Yi-Huan Chen, Hsinchu, TW;

Yu-Bin Zhao, New Taipei, TW;

Ming-Ta Lei, Hsinchu, TW;

Li-Hsuan Yeh, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4236 (2013.01); H01L 21/28114 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/42376 (2013.01);
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a top surface, a source region, and a drain region. The semiconductor device structure includes a gate structure over the top surface and extending into the semiconductor substrate. The gate structure in the semiconductor substrate is between the source region and the drain region and separates the source region from the drain region. The semiconductor device structure includes an isolation structure in the semiconductor substrate and surrounding the source region, the drain region, and the gate structure in the semiconductor substrate.


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