The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2018
Filed:
Oct. 12, 2017
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chi-Yang Yu, Taoyuan, TW;
Chin-Liang Chen, Kaohsiung, TW;
Hai-Ming Chen, Kaohsiung, TW;
Kuan-Lin Ho, Hsinchu, TW;
Yu-Min Liang, Taoyuan, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
An integrated fan-out package includes a die, an encapsulant, a redistribution structure, a plurality of conductive pillars, a seed layer, and a plurality of conductive bumps. The encapsulant encapsulates the die. The redistribution structure is over the die and the encapsulant. The redistribution structure is electrically connected to the die and includes a plurality of dielectric layers that are sequentially stacked and a plurality of conductive patterns sandwiched between the dielectric layers. A Young's modulus of the dielectric layer farthest away from the die is higher than a Young's modulus of each of the rest of the dielectric layers. The conductive patterns are electrically connected to each other. The conductive pillars are disposed on and electrically connected to the redistribution structure. The seed layer is located between the conductive pillars and the redistribution structure. The conductive bumps are disposed on the plurality of conductive pillars.